These monolithic positive-edge-triggered D-type flip-flops have a direct clear (CLR) input. The 'HC175 feature complementary outputs from each flip-flop. Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
The SN54HC175 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74HC175 is characterized for operation from 40°C to 85°C.
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, qJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78°C/W
P
Post a Buying Lead
Required Field 
